Friday, February 5, 2010

CONTINUATION OF KARNAUGH METHOD

3-Variable Karnaugh Maps

Here is the truth table for a 3-person majority voting system:


input C input B input A output
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 1


This is converted into a Karnaugh map, as follows:

majority voting K-map

Look carefully at the variables at the top of the Karnaugh map. These are not written in binary order 00, 01, 10, 11 etc. Instead, each column differs from the previous one by just one bit. This is called Grey code and it is essential for your Karnaugh map to work that you enter the column values in this order. (You will find out more about Grey code later.)

Within the K-map, you can identify three groups of two, as indicated. The left hand horizontal group combines the cells and A.B.C. Within this group, the value of B does not affect the cell values. This means that B can be eliminated from the expression, leaving A.C.

Work through the other groups to confirm that you understand how the remaining terms in the Boolean expression were derived.

With a little practice, this method is going to be quicker than the alternative, simplfiying the Boolean expression derived from the truth table:


4-Variable Maps

A 4-variable map will contain 24 = 16 cells. It is important to write the variable values along the columns and rows in Grey code:

k_06.wmf (4446 bytes)

To simplify the equation:

The Karnaugh map becomes:

k_07.wmf (9616 bytes)

To give the simplest Boolean statement, you should put a circle round the maximum number of terms.

In this case, you can make two groups of four, one of which wraps around from top to bottom. You identify the two variables which remain constant in each group and eliminate the other two:


DeMorgan’s Theorem

Slide 4
For N variables, DeMorgan’s theorem is expressed as:


Slide 4


and



EX-OR (EXclusive-OR) gate

The output Q is true if either input A is true OR input B is true, but not when both of them are true: Q = (A AND NOT B) OR (B AND NOT A)
This is like an OR gate but excluding both inputs being true.
The output is true if inputs A and B are DIFFERENT.
EX-OR gates can only have 2 inputs.
traditional EX-OR gate symbol IEC EX-OR gate symbol
Input AInput BOutput Q
000
011
101
110
Traditional symbol IEC symbol Truth Table

EX-NOR (EXclusive-NOR) gate

This is an EX-OR gate with the output inverted, as shown by the 'o' on the output.
The output Q is true if inputs A and B are the SAME (both true or both false): Q = (A AND B) OR (NOT A AND NOT B)
EX-NOR gates can only have 2 inputs.
traditional EX-NOR gate symbol IEC EX-NOR gate symbol
Input AInput BOutput Q
001
010
100
111
Traditional symbol IEC symbol Truth Table


CHARACTERISTICS OF DIGITAL IC

Digital ICs process only on/off signals. These devices can be found in microprocessors, memory chips, and microcomputers.

Slide 5
o
ICs are categorized by the type of components used in their circuits. nBipolar ICs use NPN and PNP transistors nUnipolar ICs use FET transistors. oThe transistor-transistor logic (TTL) and the complementary metal-oxide semiconductor (CMOS) families will both be examined.


Slide 6
Figure 4-30 (a) TTL INVERTER circuit; (b) CMOS INVERTER circuit.
Pin numbers are given in parentheses.



o
The TTL family consists of subfamilies.
  • The 74 series devices are all part of the standard TTL series.
  • The 74LS series devices are all part of the low power Schottky TTL series.
  • The differences between devices is limited to electrical characteristics like power dissipation and switching speed. The pin layout and logic operations are the same.
  • The 7404, 74S04, 74LS04, and 74ALS04 are all hex (six to a chip) inverters.
o
The CMOS family consists of several series.

  • CMOS devices perform the same function as, but are not necessarily pin for pin compatible with TTL devices.

Slide 9
o
*VCC for TTL devices is normally +5 V.

*VDD for CMOS devices can be from +3 to +18 V.

Slide 11
*Inputs that are not connected are said to be floating. The consequences of floating inputs differ for TTL and CMOS.

*Floating TTL input acts like a logic 1. The voltage measurement may appear in the indeterminate range, but the device will behave as if there is a 1 on the floating input.

*Floating CMOS inputs can cause overheating and damage to the device. Some ICs have protection circuits built in, but the best practice is to tie all unused inputs either high or low.



Slide 12Internal Digital IC Faults

Slide 12
o
Malfunction in internal circuitry
-Outputs do not respond properly to inputs. Outputs are unpredictable

Input internally shorted to ground or supply
-The input will be stuck in LOW or HIGH state.

Output internally shorted to ground or supply
-Output will be stuck in LOW or HIGH state.

Open-circuited input or output
-Floating input in a TTL device will result in a HIGH output. Floating input in a CMOS device will result in erratic or possibly destructive output. nAn open output will result in a floating indication.
o
Short between two pins
n-The signal at those pins will always be identical.

Slide 13Figure 4-35 (a) IC input internally shorted to ground; (b) IC input internally shorted to supply voltage. These two types of failures force the input signal at the shorted pin to stay in the same state. (c) IC output internally shorted to ground; (d) output internally shorted to supply voltage. These two failures do not affect signals at the IC inputs.










Slide 15
NAND output should be high because Z2-1 is low.



Slide 16
o


TROUBLESHOOTING CASE STUDY

Example 4-28 illustrates the process involved in troubleshooting a fairly simple circuit. oThe reasoning process can be applied to more complex digital circuits.





NAND outputs correct
XOR output should produce a low output

Internal component of Z1 could be bad
External short to Vcc along conductor
Z1-3 internally shorted to Vcc
Z2-5 internally shorted to Vcc
Z2-13 internally shorted to Vcc


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